105 search results - page 9 / 21 » Automatic design of domain-specific instructions for low-pow... |
IPCCC
2006
IEEE
15 years 4 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
IISWC
2008
IEEE
15 years 4 months ago
2008
IEEE
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
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TVLSI
2010
14 years 5 months ago
2010
Program code in a computer system can be altered either by malicious security attacks or by various faults in microprocessors. At the instruction level, all code modifications are ...
OSDI
2002
ACM
15 years 10 months ago
2002
ACM
Combining high performance with low power consumption is becoming one of the primary objectives of processor designs. Instead of relying just on sleep mode for conserving power, a...
MICRO
1993
IEEE
15 years 2 months ago
1993
IEEE
The conventional classification of inter-instruction dependencies (data, anti and output dependencies) provides a basic scheme for the analysis of pipeline hazards in pipelined in...