90 search results - page 12 / 18 » Automatic generation of synthetic sequential benchmark circu... |
TVLSI
1998
14 years 9 months ago
1998
— Excessive instantaneous power consumption may reduce the reliability and performance of VLSI chips. Hence, to synthesize circuits with high reliability, it is imperative to ef...
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...
CODES
2010
IEEE
14 years 7 months ago
2010
IEEE
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
ICCAD
1995
IEEE
15 years 29 days ago
1995
IEEE
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
ICCD
2001
IEEE
15 years 6 months ago
2001
IEEE
We present a simulation-based semi-formal verification method for sequential circuits described at the registertransfer level. The method consists of an iterative loop where cove...