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» Automatic microarchitectural pipelining
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ASPDAC
2001
ACM
81views Hardware» more  ASPDAC 2001»
15 years 1 months ago
High-level specification and efficient implementation of pipelined circuits
This paper describes a novel approach to high-level synthesis of complex pipelined circuits, including pipelined circuits with feedback. This approach combines a high-level, modula...
Maria-Cristina V. Marinescu, Martin C. Rinard
ICPR
2010
IEEE
15 years 4 months ago
Effective Structure-From-Motion for Hybrid Camera Systems
—We describe a pipeline for structure-from-motion with mixed camera types, namely omnidirectional and perspective cameras. The steps of the pipeline can be summarized as calibrat...
Yalin Bastanlar, Alptekin Temizel, Yasemin Yardimc...
DSN
2007
IEEE
15 years 4 months ago
Inherent Time Redundancy (ITR): Using Program Repetition for Low-Overhead Fault Tolerance
A new approach is proposed that exploits repetition inherent in programs to provide low-overhead transient fault protection in a processor. Programs repeatedly execute the same in...
Vimal K. Reddy, Eric Rotenberg
IEEEPACT
2007
IEEE
15 years 4 months ago
Speculative Decoupled Software Pipelining
In recent years, microprocessor manufacturers have shifted their focus from single-core to multi-core processors. To avoid burdening programmers with the responsibility of paralle...
Neil Vachharajani, Ram Rangan, Easwaran Raman, Mat...
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DATE
2004
IEEE
184views Hardware» more  DATE 2004»
15 years 1 months ago
Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements
We show how to automatically verify that complex XScale-like pipelined machine models satisfy the same safety and liveness properties as their corresponding instruction set archit...
Panagiotis Manolios, Sudarshan K. Srinivasan