302 search results - page 28 / 61 » Automatic microarchitectural pipelining |
ASPDAC
2006
ACM
15 years 3 months ago
2006
ACM
- This paper presents a DSP core for multi-core media SoC, which is optimized to execute a set of signal processing tasks very efficiently. The fully-programmable core has a data-c...
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
This paper presents elastic buffers (EBs), an efficient flow-control scheme that uses the storage already present in pipelined channels in place of explicit input virtualchannel b...
ICCD
2007
IEEE
15 years 6 months ago
2007
IEEE
As chip multiprocessors (CMPs) become the only viable way to scale up and utilize the abundant transistors made available in current microprocessors, the design of on-chip network...
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Voted
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—Supply voltage fluctuations that result from inductive noise are increasingly troublesome in modern microprocessors. A voltage “emergency”, i.e., a swing beyond tol...
DATE
2007
IEEE
15 years 4 months ago
2007
IEEE
Recently there has been considerable interest in incorporating timing effects of microarchitectural features of processors (e.g. caches and pipelines) into the schedulability anal...