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» Automatic microarchitectural pipelining
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APCSAC
2006
IEEE
15 years 3 months ago
Functional Unit Chaining: A Runtime Adaptive Architecture for Reducing Bypass Delays
Abstract. Bypass delays are expected to grow beyond 1ns as technology scales. These delays necessitate pipelining of bypass paths at processor frequencies above 1GHz and thus affe...
Lih Wen Koh, Oliver Diessel
FPGA
2004
ACM
147views FPGA» more  FPGA 2004»
15 years 3 months ago
The SFRA: a corner-turn FPGA architecture
FPGAs normally operate at whatever clock rate is appropriate for the loaded configuration. When FPGAs are used as computational devices in a larger system, however, it is better ...
Nicholas Weaver, John R. Hauser, John Wawrzynek
DOCENG
2007
ACM
15 years 1 months ago
Speculative document evaluation
Optimisation of real world Variable Data printing (VDP) documents is a difficult problem because the interdependencies between layout functions may drastically reduce the number o...
Alexander J. Macdonald, David F. Brailsford, Steve...
CHES
2006
Springer
205views Cryptology» more  CHES 2006»
15 years 1 months ago
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
Konrad J. Kulikowski, Alexander B. Smirnov, Alexan...
CGF
2008
93views more  CGF 2008»
14 years 9 months ago
Local Volume Preservation for Skinned Characters
Generating plausible deformations of a character skin within the standard production pipeline is a challenge. This paper presents a volume preservation method dedicated to skinned...
Damien Rohmer, Stefanie Hahmann, Marie-Paule Cani