Sciweavers

43 search results - page 3 / 9
» Automatic synthesis and scheduling of multirate DSP algorith...
Sort
View
97
Voted
DAC
2005
ACM
16 years 2 months ago
Automatic generation of customized discrete fourier transform IPs
This paper presents a parameterized soft core generator for the discrete Fourier transform (DFT). Reusable IPs of digital signal processing (DSP) kernels are important time-saving...
Grace Nordin, Peter A. Milder, James C. Hoe, Marku...
104
Voted
SCOPES
2005
Springer
15 years 6 months ago
Software Synthesis from the Dataflow Interchange Format
Specification, validation, and synthesis are important aspects of embedded systems design. The use of dataflow-based design environments for these purposes is becoming increasingl...
Chia-Jui Hsu, Shuvra S. Bhattacharyya
119
Voted
ASPDAC
2005
ACM
104views Hardware» more  ASPDAC 2005»
15 years 3 months ago
On multiple-voltage high-level synthesis using algorithmic transformations
— This paper presents a multiple-voltage high-level synthesis methodology for low power DSP applications using algorithmic transformation techniques. Our approach is motivated by...
Hsueh-Chih Yang, Lan-Rong Dung
93
Voted
DATE
1999
IEEE
105views Hardware» more  DATE 1999»
15 years 5 months ago
Identification and Exploitation of Symmetries in DSP Algorithms
In many algorithms, particularly those in the DSP domain, certain forms of symmetry can be observed. To efficiently implement such algorithms, it is often possible to exploit thes...
C. A. J. van Eijk, E. T. A. F. Jacobs, Bart Mesman...
329
Voted
DAC
2012
ACM
13 years 3 months ago
Equivalence checking for behaviorally synthesized pipelines
Loop pipelining is a critical transformation in behavioral synthesis. It is crucial to producing hardware designs with acceptable latency and throughput. However, it is a complex ...
Kecheng Hao, Sandip Ray, Fei Xie