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DAC
2012
ACM
13 years 7 months ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu
ICASSP
2010
IEEE
15 years 5 months ago
Improved Internet traffic analysis via optimized sampling
Applications to evaluate Internet quality-of-service and increase network security are essential to maintaining reliability and high performance in computer networks. These applic...
Sean McPherson, Antonio Ortega
IJNSEC
2008
132views more  IJNSEC 2008»
15 years 4 months ago
Optimal Energy-Delay Routing Protocol with Trust Levels for Wireless Ad Hoc Networks
This paper presents the Trust Level Routing (TLR) protocol, an extension of the optimized energy-delay routing (OEDR) protocol, focusing on the integrity, reliability and survivab...
Eyad Taqieddin, S. Jagannathan, Ann Miller
ICS
2010
Tsinghua U.
15 years 9 months ago
Small-ruleset regular expression matching on GPGPUs: quantitative performance analysis and optimization
We explore the intersection between an emerging class of architectures and a prominent workload: GPGPUs (General-Purpose Graphics Processing Units) and regular expression matching...
Jamin Naghmouchi, Daniele Paolo Scarpazza, Mladen ...
SBACPAD
2003
IEEE
103views Hardware» more  SBACPAD 2003»
15 years 10 months ago
Profiling and Optimization of Software-Based Network-Analysis Applications
A large set of tools for network monitoring and accounting, security, traffic analysis and prediction — more broadly, for network operation and management — require direct and...
Loris Degioanni, Mario Baldi, Fulvio Risso, Gianlu...