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» Automating Coherent Logic
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96
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DAC
2006
ACM
16 years 1 months ago
An adaptive FPGA architecture with process variation compensation and reduced leakage
Process induced threshold voltage variations bring about fluctuations in circuit delay, that affect the FPGA timing yield. We propose an adaptive FPGA architecture that compensate...
Georges Nabaa, Navid Azizi, Farid N. Najm
89
Voted
DAC
2006
ACM
16 years 1 months ago
Scheduling-based test-case generation for verification of multimedia SoCs
Multimedia SoCs are characterized by a main controller that directs the activity of several cores, each of which is in charge of a stage in the processing of a media stream. The v...
Amir Nahir, Avi Ziv, Roy Emek, Tal Keidar, Nir Ron...
DAC
2006
ACM
16 years 1 months ago
Efficient SAT-based Boolean matching for FPGA technology mapping
Most FPGA technology mapping approaches either target Lookup Tables (LUTs) or relatively simple Programmable Logic Blocks (PLBs). Considering networks of PLBs during technology map...
Sean Safarpour, Andreas G. Veneris, Gregg Baeckler...
108
Voted
WWW
2003
ACM
16 years 1 months ago
A software framework for matchmaking based on semantic web technology
An important objective of the Semantic Web is to make Electronic Commerce interactions more flexible and automated. To achieve this, standardization of ontologies, message content...
Lei Li, Ian Horrocks
217
Voted
ICLP
2009
Springer
16 years 1 months ago
A Language for Large Ensembles of Independently Executing Nodes
We address how to write programs for distributed computing systems in which the network topology can change dynamically. Examples of such systems, which we call ensembles, include ...
Michael P. Ashley-Rollman, Peter Lee, Seth Copen G...