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ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
16 years 1 months ago
A Two-Layer Bus Routing Algorithm for High-Speed Boards
The increasing clock frequencies in high-end industrial circuits bring new routing challenges that can not be handled by traditional algorithms. An important design automation pro...
Muhammet Mustafa Ozdal, Martin D. F. Wong
ICCAD
2008
IEEE
140views Hardware» more  ICCAD 2008»
16 years 29 days ago
To SAT or not to SAT: Ashenhurst decomposition in a large scale
Functional decomposition is a fundamental operation in logic synthesis. Prior BDD-based approaches to functional decomposition suffer from the memory explosion problem and do not...
Hsuan-Po Lin, Jie-Hong Roland Jiang, Ruei-Rung Lee
ICCAD
2007
IEEE
157views Hardware» more  ICCAD 2007»
16 years 29 days ago
Performance and power evaluation of a 3D CMOS/nanomaterial reconfigurable architecture
—In this paper, we introduce a novel reconfigurable architecture, named 3D nFPGA, which utilizes 3D integration techniques and new nanoscale materials synergistically. The propos...
Chen Dong, Deming Chen, Sansiri Tanachutiwat, Wei ...
ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
16 years 29 days ago
Guaranteeing performance yield in high-level synthesis
Meeting timing constraint is one of the most important issues for modern design automation tools. This situation is exacerbated with the existence of process variation. Current hi...
Wei-Lun Hung, Xiaoxia Wu, Yuan Xie
TACAS
2009
Springer
122views Algorithms» more  TACAS 2009»
15 years 11 months ago
Test Input Generation for Programs with Pointers
Software testing is an essential process to improve software quality in practice. Researchers have proposed several techniques to automate parts of this process. In particular, sym...
Dries Vanoverberghe, Nikolai Tillmann, Frank Piess...