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144
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IPPS
2006
IEEE
15 years 9 months ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
153
Voted
IPPS
2006
IEEE
15 years 9 months ago
FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
125
Voted
IROS
2006
IEEE
104views Robotics» more  IROS 2006»
15 years 9 months ago
Resource Management with RFID Technology in Automatic Warehouse System
— Warehouse operation has become a critical activity in supply chain to outperform competitors on customer service, lead times and costs. However, managers often meet difficulti...
Guidong Liu, Wensheng Yu, Yu Liu
113
Voted
LICS
2006
IEEE
15 years 9 months ago
Saturated Semantics for Reactive Systems
The semantics of process calculi has traditionally been specified by labelled transition systems (LTS), but with the development of name calculi it turned out that reaction rules...
Filippo Bonchi, Barbara König, Ugo Montanari
129
Voted
MIAR
2006
IEEE
15 years 9 months ago
Pulsative Flow Segmentation in MRA Image Series by AR Modeling and EM Algorithm
Segmentation of CSF and pulsative blood flow, based on a single phase contrast MRA (PC-MRA) image can lead to imperfect classifications. In this paper, we present a novel automated...
Ali Gooya, Hongen Liao, Kiyoshi Matsumiya, Ken Mas...