4273 search results - page 827 / 855 » Autonomic power and performance management for computing sys... |
TC
2008
14 years 9 months ago
2008
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
ATAL
2009
Springer
15 years 4 months ago
2009
Springer
Gaze is an extremely important aspect of human face to face interaction. Over the course of an interaction, a single individual’s gaze can perform many different functions, such...
IEEEPACT
2007
IEEE
15 years 4 months ago
2007
IEEE
Transactional Memory (TM) simplifies parallel programming by supporting atomic and isolated execution of user-identified tasks. To date, TM programming has required the use of l...
105
click to vote
IEEEPACT
2007
IEEE
15 years 4 months ago
2007
IEEE
As multi-core architectures flourish in the marketplace, multi-application workload scenarios (such as server consolidation) are growing rapidly. When running multiple application...
ISCA
2010
IEEE
15 years 3 months ago
2010
IEEE
Continued device scaling enables microprocessors and other systems-on-chip (SoCs) to increase their performance, functionality, and hence, complexity. Simultaneously, relentless s...