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IJCAI
1997
14 years 11 months ago
Evolvable Hardware for Generalized Neural Networks
This paper describes an evolvable hardware (EHW) system for generalized neural network learning. We have developed an ASIC VLSI chip, which is a building block to configure a scal...
Masahiro Murakawa, Shuji Yoshizawa, Isamu Kajitani...
MEMICS
2010
14 years 4 months ago
Simultaneous Tracking of Multiple Objects Using Fast Level Set-Like Algorithm
A topological flexibility of implicit active contours is of great benefit, since it allows simultaneous detection of several objects without any a priori knowledge about their num...
Martin Maska, Pavel Matula, Michal Kozubek
PATMOS
2004
Springer
15 years 3 months ago
Leakage Power Analysis and Comparison of Deep Submicron Logic Gates
Basic combinational gates, including NAND, NOR and XOR, are fundamental building blocks in CMOS digital circuits. This paper analyses and compares the power consumption due to tran...
Geoff V. Merrett, Bashir M. Al-Hashimi
75
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IWCIA
2004
Springer
15 years 3 months ago
Shape Preserving Sampling and Reconstruction of Grayscale Images
Abstract. The expressiveness of a lot of image analysis algorithms depends on the question whether shape information is preserved during digitization. Most existing approaches to a...
Peer Stelldinger
DATE
1999
IEEE
81views Hardware» more  DATE 1999»
15 years 1 months ago
A Power Estimation Model for High-Speed CMOS A/D Converters
Power estimation is important for system-level exploration and trade-off analysis of VLSI systems. A power estimator for high-speed analog to digital converters that exploits info...
Erik Lauwers, Georges G. E. Gielen