269 search results - page 32 / 54 » Axiomatic Digital Topology |
CCECE
2009
IEEE
15 years 2 months ago
2009
IEEE
A truly monolithic clock and data recovery (CDR) circuit for low cost low-end data communication systems has been realized in 0.6ȝm CMOS. The implemented CDR comprises a phase-an...
ICCAD
1998
IEEE
15 years 1 months ago
1998
IEEE
In this paper we present a new fanout optimization algorithm which is particularly suitable for digital circuits designed with submicron CMOS technologies. Restricting the class o...
73
Voted
AGENTS
1997
Springer
15 years 1 months ago
1997
Springer
A feature extraction system based on artificial life concepts is presented. The system provides automatic character feature extraction through the local actions of autonomous feat...
CCS
2007
ACM
15 years 1 months ago
2007
ACM
Defending against denial-of-service (DoS) in a mobile ad hoc network (MANET) is challenging because the network topology is dynamic and nodes are selfish. In this paper, we propos...
DAC
2010
ACM
15 years 1 months ago
2010
ACM
—Discrete gate sizing is one of the most commonly used, flexible, and powerful techniques for digital circuit optimization. The underlying problem has been proven to be NP-hard ...