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» BASE: Using Abstraction to Improve Fault Tolerance
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FPL
2004
Springer
130views Hardware» more  FPL 2004»
15 years 3 months ago
BIST Based Interconnect Fault Location for FPGAs
This paper presents a novel approach to interconnect fault location for FPGAs during power-on sequence. The method is based on a concept known as fault grading which utilizes defec...
Nicola Campregher, Peter Y. K. Cheung, Milan Vasil...
DATE
2010
IEEE
145views Hardware» more  DATE 2010»
15 years 2 months ago
An evaluation of a slice fault aware tool chain
Abstract—As FPGA sizes and densities grow, their manufacturing yields decrease. This work looks toward reclaiming some of this lost yield. Several previous works have suggested f...
Adwait Gupte, Phillip Jones
58
Voted
BIOSYSTEMS
2007
52views more  BIOSYSTEMS 2007»
14 years 9 months ago
The genotypic complexity of evolved fault-tolerant and noise-robust circuits
Noise and component failure is an increasingly difficult problem in modern electronic design. Bioinspired techniques is one approach that is applied in an effort to solve such is...
Morten Hartmann, Pauline C. Haddow, Per Kristian L...
SRDS
2000
IEEE
15 years 2 months ago
Modeling Fault-Tolerant Mobile Agent Execution as a Sequence of Agreement Problems
Fault-tolerance is fundamental to the further development of mobile agent applications. In the context of mobile agents, fault-tolerance prevents a partial or complete loss of the...
Stefan Pleisch, André Schiper
IPPS
1999
IEEE
15 years 1 months ago
A Dynamic Fault-Tolerant Mesh Architecture
A desired mesh architecture, based on connected-cycle modules, is constructed. To enhance the reliability, multiple bus sets and spare nodes are dynamically inserted to construct m...
Jyh-Ming Huang, Ted C. Yang