3281 search results - page 134 / 657 » Bases for parametrized iterativity |
ASPDAC
2006
ACM
15 years 7 months ago
2006
ACM
Statistical timing analysis has been widely applied to predict the timing yield of VLSI circuits when process variations become significant. Existing statistical latch timing met...
ICA
2010
Springer
15 years 1 months ago
2010
Springer
The problem of estimating a sparse channel, i.e. a channel with a few non-zero taps, appears in many fields of communication including acoustic underwater or wireless transmissions...
111
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PC
2002
15 years 1 months ago
2002
This paper presents a solution to the open problem of finding the optimal tile size to minimise the execution time of a parallelogram-shaped iteration space on a distributed memory...
151
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AUTOMATICA
2011
14 years 8 months ago
2011
We present a framework to solve a finite-time optimal control problem for parabolic partial differential equations (PDEs) with diffusivity-interior actuators, which is motivate...
120
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DAC
2002
ACM
16 years 2 months ago
2002
ACM
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...