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INFOCOM
2002
IEEE
15 years 4 months ago
Fair Scheduling and Buffer Management in Internet Routers
Abstract—Input buffered switch architecture has become attractive for implementing high performance routers and expanding use of the Internet sees an increasing need for quality ...
Nan Ni, Laxmi N. Bhuyan
SIGMOD
2010
ACM
211views Database» more  SIGMOD 2010»
15 years 4 months ago
ERACER: a database approach for statistical inference and data cleaning
Real-world databases often contain syntactic and semantic errors, in spite of integrity constraints and other safety measures incorporated into modern DBMSs. We present ERACER, an...
Chris Mayfield, Jennifer Neville, Sunil Prabhakar
EUROCRYPT
2010
Springer
15 years 4 months ago
Protecting Circuits from Leakage: the Computationally-Bounded and Noisy Cases
Abstract. Physical computational devices leak side-channel information that may, and often does, reveal secret internal states. We present a general transformation that compiles an...
Sebastian Faust, Tal Rabin, Leonid Reyzin, Eran Tr...
SEMWEB
2001
Springer
15 years 4 months ago
Open Learning Repositories and Metadata Modeling
Building repositories for e-learning is an iterative process and course content and course structure are always changing. We realized the necessity to separate content from structu...
Hadhami Dhraief, Wolfgang Nejdl, Boris Wolf, Marti...
VLSID
2000
IEEE
90views VLSI» more  VLSID 2000»
15 years 4 months ago
Performance Analysis of Systems with Multi-Channel Communication Architectures
This paper presents a novel system performance analysis technique to support the design of custom communication architectures for System-on-Chip ICs. Our technique fills a gap in...
Kanishka Lahiri, Sujit Dey, Anand Raghunathan