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CF
2005
ACM
14 years 12 months ago
A case for a working-set-based memory hierarchy
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...
Steve Carr, Soner Önder
CASES
2006
ACM
15 years 1 months ago
Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
Won So, Alexander G. Dean
POPL
2007
ACM
15 years 10 months ago
Locality approximation using time
Reuse distance (i.e. LRU stack distance) precisely characterizes program locality and has been a basic tool for memory system research since the 1970s. However, the high cost of m...
Xipeng Shen, Jonathan Shaw, Brian Meeker, Chen Din...
IEEEPACT
1999
IEEE
15 years 2 months ago
The Effect of Program Optimization on Trace Cache Efficiency
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetching program instructions in dynamic execution order, dramatically improves inst...
Derek L. Howard, Mikko H. Lipasti
PLDI
1998
ACM
15 years 2 months ago
Exploiting Idle Floating-Point Resources for Integer Execution
In conventional superscalar microarchitectures with partitioned integer and floating-point resources, all floating-point resources are idle during execution of integer programs....
S. Subramanya Sastry, Subbarao Palacharla, James E...