Sciweavers

3228 search results - page 192 / 646
» Basics of Compiler Design
Sort
View
MICRO
1999
IEEE
110views Hardware» more  MICRO 1999»
15 years 7 months ago
Balance Scheduling: Weighting Branch Tradeoffs in Superblocks
Since there is generally insufficient instruction level parallelism within a single basic block, higher performance is achieved by speculatively scheduling operations in superbloc...
Alexandre E. Eichenberger, Waleed Meleis
IEEEPACT
1998
IEEE
15 years 7 months ago
Athapascan-1: On-Line Building Data Flow Graph in a Parallel Language
In order to achieve practical efficient execution on a parallel architecture, a knowledge of the data dependencies related to the application appears as the key point for building...
François Galilée, Jean-Louis Roch, G...
179
Voted
IPPS
1997
IEEE
15 years 7 months ago
DPF: A Data Parallel Fortran Benchmark Suite
We present the Data Parallel Fortran (DPF) benchmark suite, a set of data parallel Fortran codes forevaluatingdata parallel compilers appropriatefor any target parallel architectu...
Y. Charlie Hu, S. Lennart Johnsson, Dimitris Kehag...
SIGMOD
1994
ACM
107views Database» more  SIGMOD 1994»
15 years 7 months ago
QuickStore: A High Performance Mapped Object Store
This paper presents, QuickStore, a memory-mapped storage system for persistent C++ built on top of the EXODUS Storage Manager. QuickStore provides fast access to in-memory objects...
Seth J. White, David J. DeWitt
120
Voted
ICS
2010
Tsinghua U.
15 years 5 months ago
Speeding up Nek5000 with autotuning and specialization
Autotuning technology has emerged recently as a systematic process for evaluating alternative implementations of a computation, in order to select the best-performing solution for...
Jaewook Shin, Mary W. Hall, Jacqueline Chame, Chun...