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154
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JSA
2010
158views more  JSA 2010»
14 years 10 months ago
Scalable mpNoC for massively parallel systems - Design and implementation on FPGA
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
Mouna Baklouti, Yassine Aydi, Philippe Marquet, Je...
122
Voted
BMCBI
2011
14 years 7 months ago
LAVA: An Open-Source Approach To Designing LAMP (Loop-Mediated Isothermal Amplification) DNA Signatures
Background: We developed an extendable open-source Loop-mediated isothermal AMPlification (LAMP) signature design program called LAVA (LAMP Assay Versatile Analysis). LAVA was cre...
Clinton Torres, Elizabeth A. Vitalis, Brian R. Bak...
156
Voted
MSWIM
2009
ACM
15 years 10 months ago
Design and evaluation of host identity protocol (HIP) simulation framework for INET/OMNeT++
Host Identity Protocol (HIP) decouples IP addresses from higher layer Internet applications by proposing a new, cryptographic namespace for host identities. HIP has great potentia...
László Bokor, Szabolcs Novácz...
152
Voted
KCAP
2009
ACM
15 years 10 months ago
Biomedical knowledge engineering tools based on experimental design: a case study based on neuroanatomical tract-tracing experim
Curating information from the literature for storage in databases is a crucial task in biological research, and many groups assign a particular person or team to that process. We ...
Gully A. P. C. Burns, Thomas A. Russ
149
Voted
ISCA
2007
IEEE
167views Hardware» more  ISCA 2007»
15 years 9 months ago
New cache designs for thwarting software cache-based side channel attacks
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike physical side channel attacks that mostly target embedded cryptographic devices,...
Zhenghong Wang, Ruby B. Lee