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TVLSI
2002
102views more  TVLSI 2002»
15 years 4 months ago
Low-power data forwarding for VLIW embedded architectures
In this paper, we propose a low-power approach to the design of embedded very long instruction word (VLIW) processor architectures based on the forwarding (or bypassing) hardware, ...
Mariagiovanna Sami, Donatella Sciuto, Cristina Sil...
PVLDB
2008
134views more  PVLDB 2008»
15 years 4 months ago
Evita raced: metacompilation for declarative networks
Declarative languages have recently been proposed for many new applications outside of traditional data management. Since these are relatively early research efforts, it is import...
Tyson Condie, David Chu, Joseph M. Hellerstein, Pe...
174
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SAMOS
2010
Springer
15 years 3 months ago
Cycle-accurate performance modelling in an ultra-fast just-in-time dynamic binary translation instruction set simulator
—Instruction set simulators (ISS) are vital tools for compiler and processor architecture design space exploration and verification. State-of-the-art simulators using just-in-ti...
Igor Böhm, Björn Franke, Nigel P. Topham
SBMF
2010
Springer
205views Formal Methods» more  SBMF 2010»
14 years 11 months ago
A High-Level Language for Modeling Algorithms and Their Properties
Designers of concurrent and distributed algorithms usually express them using pseudo-code. In contrast, most verification techniques are based on more mathematically-oriented forma...
Sabina Akhtar, Stephan Merz, Martin Quinson
HPCA
2012
IEEE
14 years 15 days ago
Pacman: Tolerating asymmetric data races with unintrusive hardware
Data races are a major contributor to parallel software unreliability. A type of race that is both common and typically harmful is the Asymmetric data race. It occurs when at leas...
Shanxiang Qi, Norimasa Otsuki, Lois Orosa Nogueira...