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ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
15 years 3 months ago
A non-uniform cache architecture for low power system design
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
Tohru Ishihara, Farzan Fallah
CICLING
2005
Springer
15 years 3 months ago
Design and Development of a System for the Detection of Agreement Errors in Basque
This paper presents the design and development of a system for the detection and correction of syntactic errors in free texts. The system is composed of three main modules: a) a ro...
Arantza Díaz de Ilarraza Sánchez, Ko...
ENTCS
2007
98views more  ENTCS 2007»
14 years 9 months ago
Type Systems for Optimizing Stack-based Code
We give a uniform type-systematic account of a number of optimizations and the underlying analyses for a bytecode-like stack-based low-level language, including analysis soundness...
Ando Saabas, Tarmo Uustalu
CASES
2006
ACM
15 years 3 months ago
Supporting precise garbage collection in Java Bytecode-to-C ahead-of-time compiler for embedded systems
A Java bytecode-to-C ahead-of-time compiler (AOTC) can improve the performance of a Java virtual machine (JVM) by translating bytecode into C code, which is then compiled into mac...
Dong-Heon Jung, Sung-Hwan Bae, Jaemok Lee, Soo-Moo...
DAC
2003
ACM
15 years 3 months ago
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation
Instruction set simulators are critical tools for the exploration and validation of new programmable architectures. Due to increasing complexity of the architectures and timeto-ma...
Mehrdad Reshadi, Prabhat Mishra, Nikil D. Dutt