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ESIAT
2009
IEEE
14 years 7 months ago
Analyzing and Designing of the Classroom Teaching System Based on the Network
The rapid development of the network technology greatly expands information communication between people and makes the network education become real. Network education has already ...
Delin Hou, Huosong Xia
VLSID
2007
IEEE
231views VLSI» more  VLSID 2007»
15 years 10 months ago
AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Ma...
ACMMSP
2006
ACM
250views Hardware» more  ACMMSP 2006»
15 years 3 months ago
What do high-level memory models mean for transactions?
Many people have proposed adding transactions, or atomic blocks, to type-safe high-level programming languages. However, researchers have not considered the semantics of transacti...
Dan Grossman, Jeremy Manson, William Pugh
PPDP
1999
Springer
15 years 2 months ago
C--: A Portable Assembly Language that Supports Garbage Collection
For a compiler writer, generating good machine code for a variety of platforms is hard work. One might try to reuse a retargetable code generator, but code generators are complex a...
Simon L. Peyton Jones, Norman Ramsey, Fermin Reig
ICRA
2005
IEEE
155views Robotics» more  ICRA 2005»
15 years 3 months ago
CPG Design using Inhibitory Networks
– We describe in detail the behavior of an inhibitory Central Pattern Generator (CPG) network for robot control. A four-neuron, mutual inhibitory network forms the basic coordina...
M. Anthony Lewis, Francesco Tenore, Ralph Etienne-...