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LCTRTS
2001
Springer
15 years 2 months ago
ILP-based Instruction Scheduling for IA-64
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
Daniel Kästner, Sebastian Winkel
RSP
1998
IEEE
162views Control Systems» more  RSP 1998»
15 years 2 months ago
The STEP Standard as an Approach for Design and Prototyping
STEP is an ISO standard (ISO-10303) for the computerinterpretable representation and exchange of product data. Parts of STEP standardize conceptual structures and usage ofinformat...
Alain Plantec, Vincent Ribaud
WCET
2008
14 years 11 months ago
Applying WCET Analysis at Architectural Level
Real-Time embedded systems must enforce strict timing constraints. In this context, achieving precise Worst Case Execution Time is a prerequisite to apply scheduling analysis and ...
Olivier Gilles, Jérôme Hugues
DAC
2009
ACM
15 years 1 months ago
Reduction techniques for synchronous dataflow graphs
The Synchronous Dataflow (SDF) model of computation is popular for modelling the timing behaviour of real-time embedded hardware and software systems and applications. It is an es...
Marc Geilen
SMA
2003
ACM
100views Solid Modeling» more  SMA 2003»
15 years 3 months ago
Free-form deformations via sketching and manipulating scalar fields
This paper presents a novel Scalar-field based Free-Form Deformation (SFFD) technique founded upon general flow constraints and implicit functions. In contrast to the traditiona...
Jing Hua, Hong Qin