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» Bayesian Algorithmic Mechanism Design
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89
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DATE
2006
IEEE
98views Hardware» more  DATE 2006»
15 years 6 months ago
Power-constrained test scheduling for multi-clock domain SoCs
This paper presents a wrapper and test access mechanism design for multi-clock domain SoCs that consists of cores with different clock frequencies during test. We also propose a t...
Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara
123
Voted
ICMCS
2006
IEEE
157views Multimedia» more  ICMCS 2006»
15 years 6 months ago
Using Rate-Distortion Metrics for Real-Time Internet Video Streaming with TCP
In this paper we explore use of a new rate-distortion metric for optimizing real-time Internet video streaming with the transmission control protocol (TCP). The basic idea is to c...
Antonios Argyriou
119
Voted
IPPS
2005
IEEE
15 years 6 months ago
GHS: A Performance System of Grid Computing
Conventional performance evaluation mechanisms focus on dedicated distributed systems. Grid computing infrastructure, on another hand, is a shared collaborative environment constr...
Xian-He Sun, Ming Wu
105
Voted
ATAL
2005
Springer
15 years 6 months ago
Simulating data dissemination techniques for local reputation systems
In distributed scenarios the robustness of a reputation mechanism depends on the data available for computation. Especially in ad-hoc networks the amount of available data is rest...
Andreas Schlosser, Marco Voss
133
Voted
INTERACT
2003
15 years 2 months ago
Pointing in Intelligent Environments with the WorldCursor
: We introduce the WorldCursor, a pointing device and cursor designed for intelligent environments. The WorldCursor is analogous to the mouse and cursor used in traditional GUIs: t...
Andrew Wilson, Hubert Pham