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SAMOS
2007
Springer
15 years 3 months ago
Automated Power Gating of Registers Using CoDeL and FSM Branch Prediction
In this paper, we use the CoDeL hardware design platform to analyze the potential and performance impact of power gating individual registers. For each register, we examine the per...
Nainesh Agarwal, Nikitas J. Dimopoulos
51
Voted
ASPDAC
2004
ACM
109views Hardware» more  ASPDAC 2004»
15 years 3 months ago
Resource-constrained low-power bus encoding with crosstalk delay elimination
— In deep-submicron (DSM) technology, minimizing power consumption of a bus is one of the most important design objectives in embedded system-on-chip (SoC) design. In this paper,...
Meeyoung Cha, Chun-Gi Lyuh, Taewhan Kim
ATAL
2003
Springer
15 years 2 months ago
A multiagent-system for integrating a large-scale project
This paper presents a multiagent-system for integrating ALICE: a real-life, distributed, large-scale particle physics experiment of the LHC project at CERN. The work is concerned ...
Carlos Eisenberg, Boi Faltings, Lars Leistam
DATE
2010
IEEE
168views Hardware» more  DATE 2010»
15 years 2 months ago
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
Luca Sterpone, Niccolò Battezzati
ASPLOS
2000
ACM
15 years 2 months ago
Power Aware Page Allocation
One of the major challenges of post-PC computing is the need to reduce energy consumption, thereby extending the lifetime of the batteries that power these mobile devices. Memory ...
Alvin R. Lebeck, Xiaobo Fan, Heng Zeng, Carla Schl...