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89
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ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
15 years 3 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
IJDMBC
2010
115views more  IJDMBC 2010»
14 years 4 months ago
Near Optimum Power Control and Precoding under Fairness Constraints in Network MIMO Systems
Abstract--We consider the problem of setting the uplink signalto-noise-and-interference (SINR) target and allocating transmit powers for mobile stations in multicell spatial multip...
Gábor Fodor, Mikael Johansson, Pablo Soldat...
ICIP
2009
IEEE
15 years 10 months ago
Pfid: Pittsburgh Fast-food Image Dataset
We introduce the first visual dataset of fast foods with a total of 4,545 still images, 606 stereo pairs, 303 3600 videos for structure from motion, and 27 privacy-preserving vide...
CODES
1999
IEEE
15 years 2 months ago
An ASIP design methodology for embedded systems
A well-known challenge during processor design is to obtain the best possible results for a typical target application domain that is generally described as a set of benchmarks. O...
Kayhan Küçükçakar
76
Voted
ATAL
2010
Springer
14 years 10 months ago
Merging example plans into generalized plans for non-deterministic environments
We present a new approach for finding generalized contingent plans with loops and branches in situations where there is uncertainty in state properties and object quantities, but ...
Siddharth Srivastava, Neil Immerman, Shlomo Zilber...