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HPCA
1999
IEEE
15 years 4 months ago
Using Lamport Clocks to Reason about Relaxed Memory Models
Cache coherence protocols of current shared-memory multiprocessors are difficult to verify. Our previous work proposed an extension of Lamport's logical clocks for showing th...
Anne Condon, Mark D. Hill, Manoj Plakal, Daniel J....
ICLP
2007
Springer
15 years 6 months ago
Static Region Analysis for Mercury
Abstract. Region-based memory management is a form of compiletime memory management, well-known from the functional programming world. This paper describes a static region analysis...
Quan Phan, Gerda Janssens
PPOPP
2010
ACM
15 years 9 months ago
Modeling transactional memory workload performance
Transactional memory promises to make parallel programming easier than with fine-grained locking, while performing just as well. This performance claim is not always borne out bec...
Donald E. Porter, Emmett Witchel
DATE
2004
IEEE
130views Hardware» more  DATE 2004»
15 years 3 months ago
Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology
This paper presents an environment based on SystemC for architecture specification of programmable systems. Making use of the new architecture description language ArchC, able to ...
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Aze...
IMECS
2007
15 years 1 months ago
A Hybrid Markov Model for Accurate Memory Reference Generation
—Workload characterisation and generation is becoming an increasingly important area as hardware and application complexities continue to advance. In this paper, we introduce a c...
Rahman Hassan, Antony Harris