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» Benchmarking weak memory models
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92
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WMPI
2004
ACM
15 years 5 months ago
Understanding the effects of wrong-path memory references on processor performance
High-performance out-of-order processors spend a significant portion of their execution time on the incorrect program path even though they employ aggressive branch prediction al...
Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale ...
CACM
2008
100views more  CACM 2008»
15 years 10 days ago
TxLinux and MetaTM: transactional memory and the operating system
TxLinux is the first operating system to use hardware transactional memory (HTM) as a synchronization primitive, and the first to manage HTM in the scheduler. TxLinux, which is a ...
Christopher J. Rossbach, Hany E. Ramadan, Owen S. ...
IEEEHPCS
2010
14 years 10 months ago
Reducing memory requirements of stream programs by graph transformations
Stream languages explicitly describe fork-join parallelism and pipelines, offering a powerful programming model for many-core Multi-Processor Systems on Chip (MPSoC). In an embedd...
Pablo de Oliveira Castro, Stéphane Louise, ...
102
Voted
ENTCS
2007
97views more  ENTCS 2007»
15 years 6 days ago
An Operational Semantics for Shared Messaging Communication
Shared Messaging Communication (SMC) has been introduced in [9] as a model of communication which reduces communication costs (both in terms of communication latency and memory us...
Astrid Kiehn
EUROPAR
2010
Springer
15 years 1 months ago
A Study of a Software Cache Implementation of the OpenMP Memory Model for Multicore and Manycore Architectures
Abstract. This paper is motivated by the desire to provide an efficient and scalable software cache implementation of OpenMP on multicore and manycore architectures in general, and...
Chen Chen, Joseph B. Manzano, Ge Gan, Guang R. Gao...