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SIGMETRICS
2011
ACM
178views Hardware» more  SIGMETRICS 2011»
14 years 3 months ago
Soft error benchmarking of L2 caches with PARMA
The amount of charge stored in an SRAM cell shrinks rapidly with each technology generation thus increasingly exposing caches to soft errors. Benchmarking the FIT rate of caches d...
Jinho Suh, Mehrtash Manoochehri, Murali Annavaram,...
ICANN
2005
Springer
15 years 5 months ago
A Model for Hierarchical Associative Memories via Dynamically Coupled GBSB Neural Networks
Many approaches have emerged in the attempt to explain the memory process. One of which is the Theory of Neuronal Group Selection (TNGS), proposed by Edelman [1]. In the present wo...
Rogério M. Gomes, Antônio de Pá...
CASES
2000
ACM
15 years 4 months ago
Eliminating external fragmentation in a non-moving garbage collector for Java
Fragmentation can cause serious loss of memory in systems that are using dynamic memory management. Any useful memory management system must therefore provide means to limit fragm...
Fridtjof Siebert
MASCOTS
2010
15 years 1 months ago
Modeling the Run-time Behavior of Transactional Memory
In this paper, we develop a queuing theory based analytical model to evaluate the performance of transactional memory. Based on the statistical characteristics observed on actual e...
Zhengyu He, Bo Hong
109
Voted
CGO
2009
IEEE
15 years 7 months ago
Reducing Memory Ordering Overheads in Software Transactional Memory
—Most research into high-performance software transactional memory (STM) assumes that transactions will run on a processor with a relatively strict memory model, such as Total St...
Michael F. Spear, Maged M. Michael, Michael L. Sco...