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SAC
2010
ACM
14 years 10 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
ICCAD
2004
IEEE
134views Hardware» more  ICCAD 2004»
15 years 6 months ago
An analytic placer for mixed-size placement and timing-driven placement
We extend the APlace wirelength-driven standard-cell analytic placement framework of [21] to address timing-driven and mixedsize (“boulders and dust”) placement. Compared with...
Andrew B. Kahng, Qinke Wang
ESA
2009
Springer
127views Algorithms» more  ESA 2009»
15 years 4 months ago
Maximum Flow in Directed Planar Graphs with Vertex Capacities
In this paper we present an O(n log n) algorithm for finding a maximum flow in a directed planar graph, where the vertices are subject to capacity constraints, in addition to the...
Haim Kaplan, Yahav Nussbaum
CDC
2008
IEEE
117views Control Systems» more  CDC 2008»
15 years 4 months ago
Stability of model predictive control based on reduced-order models
— In this paper, we present a systematic procedure for obtaining closed-loop stable output-feedback model predictive control based on reduced-order models. The design uses linear...
Svein Hovland, Christian Løvaas, Jan Tommy ...
VLSID
2005
IEEE
149views VLSI» more  VLSID 2005»
15 years 10 months ago
ADOPT: An Approach to Activity Based Delay Optimization
: The direct result of shrinking devices is not only higher densities but also increased switching activity and thus higher device temperatures. The variation in temperature over t...
Gaurav Arora, Abhishek Sharma, D. Nagchoudhuri, M....