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ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
15 years 3 months ago
Optimal module and voltage assignment for low-power
– Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study ...
Deming Chen, Jason Cong, Junjuan Xu
CRV
2011
IEEE
352views Robotics» more  CRV 2011»
13 years 9 months ago
Conformative Filter: A Probabilistic Framework for Localization in Reduced Space
— Algorithmic problem reduction is a fundamental approach to problem solving in many fields, including robotics. To solve a problem using this scheme, we must reduce the problem...
Chatavut Viriyasuthee, Gregory Dudek
DAC
2009
ACM
15 years 11 months ago
O-Router:an optical routing framework for low power on-chip silicon nano-photonic integration
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, D...
VLSID
2007
IEEE
209views VLSI» more  VLSID 2007»
15 years 10 months ago
Simultaneous Power Fluctuation and Average Power Minimization during Nano-CMOS Behavioral Synthesis
We present minimization methodologies and an algorithm for simultaneous scheduling, binding, and allocation for the reduction of total power and power fluctuation during behaviora...
Saraju P. Mohanty, Elias Kougianos
ICCAD
2004
IEEE
113views Hardware» more  ICCAD 2004»
15 years 6 months ago
Vdd programmability to reduce FPGA interconnect power
Power is an increasingly important design constraint for FPGAs in nanometer technologies. Because interconnect power is dominant in FPGAs, we design Vdd-programmable interconnect ...
Fei Li, Yan Lin, Lei He