Sciweavers

615 search results - page 67 / 123
» Beta Reduction Constraints
Sort
View
ISCAS
2005
IEEE
144views Hardware» more  ISCAS 2005»
15 years 3 months ago
Event-based imaging with active illumination in sensor networks
— We discuss a distributed imaging architecture with active illumination for sensor network applications. An event-based CMOS imager is employed at the sensor level, to convert l...
Eugenio Culurciello, Thiago Teixeira, Andreas G. A...
APLAS
2005
ACM
15 years 3 months ago
Lightweight Family Polymorphism
The formal core calculus .FJ has been introduced to model lightweight family polymorphism, a programming style to support reusable yet type-safe mutually recursive classes. This pa...
Atsushi Igarashi, Chieri Saito, Mirko Viroli
ASPDAC
2004
ACM
75views Hardware» more  ASPDAC 2004»
15 years 3 months ago
Power-performance trade-off using pipeline delays
— We study the delays faced by instructions in the pipeline of a superscalar processor and its impact on power and performance. Instructions that are ready-on-dispatch (ROD) are ...
G. Surendra, Subhasis Banerjee, S. K. Nandy
DAC
2004
ACM
15 years 3 months ago
A timing-driven module-based chip design flow
A Module-Rased design flow for digital ICs with hard and sofl modules is presented. Versions of the sofl modules are implemented with different areddelay characteristics. The vers...
Fan Mo, Robert K. Brayton
ISPD
2004
ACM
120views Hardware» more  ISPD 2004»
15 years 3 months ago
On optimal physical synthesis of sleep transistors
Considering the voltage drop constraint over a distributed model for power/ground (P/G) network, we study the following two problems for physical synthesis of sleep transistors: t...
Changbo Long, Jinjun Xiong, Lei He