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ISCAS
1999
IEEE
94views Hardware» more  ISCAS 1999»
15 years 2 months ago
Lower bounds on energy dissipation and noise-tolerance for deep submicron VLSI
In this paper, we obtain the lower bounds on total energy dissipation of deep submicron (DSM) VLSI circuits via an informationtheoretic framework. This framework enables the deriv...
Rajamohana Hegde, Naresh R. Shanbhag
ISSS
1999
IEEE
157views Hardware» more  ISSS 1999»
15 years 2 months ago
Bit-Width Selection for Data-Path Implementations
Specifications of data computations may not necessarily describe the ranges of the intermediate results that can be generated. However, such information is critical to determine t...
Carlos Carreras, Juan A. López, Octavio Nie...
ICCAD
1998
IEEE
107views Hardware» more  ICCAD 1998»
15 years 2 months ago
Techniques for energy minimization of communication pipelines
The performance of many modern computer and communication systems is dictated by latency of communication pipelines. At the same time, power consumption is often another limiting ...
Gang Qu, Miodrag Potkonjak
DAC
1997
ACM
15 years 2 months ago
An Improved Algorithm for Minimum-Area Retiming
The concept of improving the timing behavior of a circuit by relocating flip-flops is called retiming and was first presented by Leiserson and Saxe. The ASTRA algorithm propose...
Naresh Maheshwari, Sachin S. Sapatnekar
VLSID
1993
IEEE
133views VLSI» more  VLSID 1993»
15 years 2 months ago
An Area-Efficient Systolic Architecture for Real-Time VLSI Finite Impulse Response Filters
An area-eficzent systolic architecture for realtime, programmable-coeBcient jinite impulse response (FIR)filters is presented. A technique called pipelined clustering is introduce...
V. Visvanathan, Nibedita Mohanty, S. Ramanathan