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» Bi-criteria Pipeline Mappings for Parallel Image Processing
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ICCAD
2001
IEEE
91views Hardware» more  ICCAD 2001»
15 years 7 months ago
A System for Synthesizing Optimized FPGA Hardware from MATLAB
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
Malay Haldar, Anshuman Nayak, Alok N. Choudhary, P...
CIMAGING
2009
94views Hardware» more  CIMAGING 2009»
14 years 7 months ago
Iterative demosaicking accelerated: theory and fast noniterative implementations
Color image demosaicking is a key process in the digital imaging pipeline. In this paper, we present a rigorous treatment of a classical demosaicking algorithm based on alternatin...
Yue M. Lu, Mina Karzand, Martin Vetterli
CAMP
2005
IEEE
15 years 3 months ago
Speeding-up NCC-Based Template Matching Using Parallel Multimedia Instructions
— This paper describes the mapping of a recently introduced template matching algorithm based on the Normalized Cross Correlation (NCC) on a general purpose processor endowed wit...
Luigi di Stefano, Stefano Mattoccia, Federico Tomb...
CLUSTER
2006
IEEE
15 years 4 months ago
Heterogeneous Parallel Computing in Remote Sensing Applications: Current Trends and Future Perspectives
Heterogeneous networks of computers have rapidly become a very promising commodity computing solution, expected to play a major role in the design of high performance computing sy...
Antonio J. Plaza
ICPR
2004
IEEE
15 years 11 months ago
Parallelizing Motion Segmentation by Perceptual Organization of XYT
The front end of many motion analysis algorithms is usually a process that generates bounding boxes around each moving object, roughly segmenting the objects from the background. ...
Daniel Majchrzak, Sudeep Sarkar