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ENTCS
2006
112views more  ENTCS 2006»
15 years 5 months ago
Distributed Symbolic Bounded Property Checking
In this paper we describe an algorithm for distributed, BDD-based bounded property checking and its implementation in the verification tool SymC. The distributed algorithm verifie...
Pradeep Kumar Nalla, Roland J. Weiss, Prakash Moha...
149
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ENTCS
2007
130views more  ENTCS 2007»
15 years 5 months ago
Specify, Compile, Run: Hardware from PSL
We propose to use a formal specification language as a high-level hardware description language. Formal languages allow for compact, unambiguous representations and yield designs...
Roderick Bloem, Stefan Galler, Barbara Jobstmann, ...
MST
2006
120views more  MST 2006»
15 years 5 months ago
Exploiting Regularities for Boolean Function Synthesis
The "regularity" of a Boolean function can be exploited for decreasing its minimization time. It has already been shown that the notion of autosymmetry is a valid measure...
Anna Bernasconi, Valentina Ciriani, Fabrizio Lucci...
ICCAD
2010
IEEE
119views Hardware» more  ICCAD 2010»
15 years 3 months ago
Symbolic system level reliability analysis
Abstract--More and more embedded systems provide a multitude of services, implemented by a large number of networked hardware components. In early design phases, dimensioning such ...
Michael Glaß, Martin Lukasiewycz, Felix Reim...
191
Voted
WER
2010
Springer
15 years 3 months ago
A Tool for Formal Feature Modeling Based on BDDs and Product Families Algebra
Feature models are commonly used to capture the commonality and the variability of product families. There are several feature model notations that correspondingly depict the conce...
Fadil Alturki, Ridha Khedri