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ISCAS
2008
IEEE
123views Hardware» more  ISCAS 2008»
15 years 11 months ago
A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop
—A 333MHz-1GHz all-digital multiphase delay-locked loop with precise multi-phase output has been designed with TSMC 130nm CMOS technology model. A modified binary search algorith...
Li-Pu Chuang, Ming-Hung Chang, Po-Tsang Huang, Chi...
148
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WABI
2007
Springer
15 years 11 months ago
Predicting Protein Folding Kinetics Via Temporal Logic Model Checking
Christopher James Langmead⋆ and Sumit Kumar Jha Department of Computer Science, Carnegie Mellon University We present a novel approach for predicting protein folding kinetics us...
Christopher James Langmead, Sumit Kumar Jha
GLVLSI
2005
IEEE
110views VLSI» more  GLVLSI 2005»
15 years 10 months ago
QCA channel routing with wire crossing minimization
Quantum-dot Cellular Automata (QCA) is a novel computing mechanism that can represent binary information based on spatial distribution of electron charge configuration in chemica...
Brian Stephen Smith, Sung Kyu Lim
128
Voted
CPAIOR
2005
Springer
15 years 10 months ago
Computing Explanations for the Unary Resource Constraint
Integration of explanations into a CSP solver is a technique addressing difficult question “why my problem has no solution”. Moreover, explanations together with advanced searc...
Petr Vilím
DEXA
2005
Springer
117views Database» more  DEXA 2005»
15 years 10 months ago
Efficient Processing of Ordered XML Twig Pattern
Finding all the occurrences of a twig pattern in an XML database is a core operation for efficient evaluation of XML queries. Holistic twig join algorithm has showed its superiorit...
Jiaheng Lu, Tok Wang Ling, Tian Yu, Changqing Li, ...