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DAC
2006
ACM
16 years 22 days ago
2006
ACM
As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people oft...
122
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SIGECOM
2005
ACM
15 years 5 months ago
2005
ACM
This paper concerns the design of mechanisms for online scheduling in which agents bid for access to a re-usable resource such as processor time or wireless network access. Each a...
ISAAC
2009
Springer
15 years 6 months ago
2009
Springer
Abstract. In a multicore transactional memory (TM) system, concurrent execution threads interact and interfere with each other through shared memory. The less interference a progra...
ICCAD
2009
IEEE
14 years 9 months ago
2009
IEEE
Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...
116
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ICCAD
1999
IEEE
15 years 4 months ago
1999
IEEE
The minimum rectilinear Steiner tree (RST) problem is one of the fundamental problems in the field of electronic design automation. The problem is NP-hard, and much work has been ...