41 search results - page 1 / 9 » Blind Optimization for Exploiting Hardware Features |
CC
2009
Springer
15 years 4 months ago
2009
Springer
Software systems typically exploit only a small fraction of the realizable performance from the underlying microprocessors. While there has been much work on hardware-aware optimiz...
FPL
1998
Springer
15 years 1 months ago
1998
Springer
This paper discusses the memory interface of custom computing machines. We present a high speed parallel memory for the MoM-PDA machine, which is based on the Xputer paradigm. The ...
CGO
2003
IEEE
15 years 2 months ago
2003
IEEE
Optimizing programs at run-time provides opportunities to apply aggressive optimizations to programs based on information that was not available at compile time. At run time, prog...
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FPGA
2008
ACM
14 years 11 months ago
2008
ACM
Stochastic simulations and other scientific applications that depend on random numbers are increasingly implemented in a parallelized manner in programmable logic. High-quality ps...
DATE
2003
IEEE
15 years 2 months ago
2003
IEEE
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...