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EUROPAR
2010
Springer
14 years 10 months ago
Power-Efficient Spilling Techniques for Chip Multiprocessors
Abstract. Current trends in CMPs indicate that the core count will increase in the near future. One of the main performance limiters of these forthcoming microarchitectures is the ...
Enric Herrero, José González, Ramon ...
82
Voted
JNW
2006
118views more  JNW 2006»
14 years 10 months ago
UMTS Capacity and Throughput Maximization for Different Spreading Factors
An analytical model for calculating capacity in multi-cell UMTS networks is presented. Capacity is maximized for different spreading factors and for perfect and imperfect power con...
Robert Akl, Son Nguyen
99
Voted
WOWMOM
2009
ACM
146views Multimedia» more  WOWMOM 2009»
15 years 4 months ago
When opportunity proceeds from autonomy: A tour-based architecture for disconnected mobile sensors
We consider the case of sparse mobile sensors deployed to implement missions in challenging environments. This paper explores a notion of tour networks that is well suited to circ...
Michel Charpentier, Radim Bartos, Swapnil Bhatia
91
Voted
CCS
2011
ACM
13 years 10 months ago
Cirripede: circumvention infrastructure using router redirection with plausible deniability
Many users face surveillance of their Internet communications and a significant fraction suffer from outright blocking of certain destinations. Anonymous communication systems a...
Amir Houmansadr, Giang T. K. Nguyen, Matthew Caesa...
83
Voted
DAC
2001
ACM
15 years 11 months ago
Latency-Driven Design of Multi-Purpose Systems-On-Chip
Milenko Drinic UCLA Computer Science Dep. 4732 Boelter Hall Los Angeles, CA 90095-1596 milenko@cs.ucla.edu Darko Kirovski Microsoft Research One Microsoft Way Redmond, WA 98052 da...
Seapahn Meguerdichian, Milenko Drinic, Darko Kirov...