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VLSID
2003
IEEE
183views VLSI» more  VLSID 2003»
16 years 1 months ago
Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks
We present an innovative design of an accurate, 2D DCT IDCT processor, which handles scaled and sub-sampled input blocks efficiently. In the IDCT mode, the latency of the processo...
Rohini Krishnan, Om Prakash Gangwal, Jos T. J. van...
IMA
2009
Springer
139views Cryptology» more  IMA 2009»
15 years 8 months ago
Security of Cyclic Double Block Length Hash Functions
Abstract. We provide the first proof of security for Abreast-DM, one of the oldest and most wellknown constructions for turning a block cipher with n-bit block length and 2n-bit k...
Ewan Fleischmann, Michael Gorski, Stefan Lucks
EMSOFT
2007
Springer
15 years 7 months ago
Block recycling schemes and their cost-based optimization in nand flash memory based storage system
Flash memory has many merits such as light weight, shock resistance, and low power consumption, but also has limitations like the erase-before-write property. To overcome such lim...
Jongmin Lee, Sunghoon Kim, Hunki Kwon, Choulseung ...
SAC
2005
ACM
15 years 7 months ago
Automatic extraction of informative blocks from webpages
Search engines crawl and index webpages depending upon their informative content. However, webpages — especially dynamically generated ones — contain items that cannot be clas...
Sandip Debnath, Prasenjit Mitra, C. Lee Giles
HIPEAC
2009
Springer
15 years 6 months ago
Revisiting Cache Block Superloading
Abstract. Technological advances and increasingly complex and dynamic application behavior argue for revisiting mechanisms that adapt logical cache block size to application charac...
Matthew A. Watkins, Sally A. McKee, Lambert Schael...