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CGO
2005
IEEE
15 years 3 months ago
Maintaining Consistency and Bounding Capacity of Software Code Caches
Software code caches are becoming ubiquitous, in dynamic optimizers, runtime tool platforms, dynamic translators, fast simulators and emulators, and dynamic compilers. Caching fre...
Derek Bruening, Saman P. Amarasinghe
IEEEPACT
2003
IEEE
15 years 3 months ago
Design Trade-Offs in High-Throughput Coherence Controllers
Recent research shows that the high occupancy of Coherence Controllers (CCs) is a major performance bottleneck in scalable shared-memory multiprocessors. In this paper, we propose...
Anthony-Trung Nguyen, Josep Torrellas
ISCA
1995
IEEE
110views Hardware» more  ISCA 1995»
15 years 1 months ago
Optimization of Instruction Fetch Mechanisms for High Issue Rates
Recent superscalar processors issue four instructions per cycle. These processors are also powered by highly-parallel superscalar cores. The potential performance can only be expl...
Thomas M. Conte, Kishore N. Menezes, Patrick M. Mi...
SPIEVIP
2010
15 years 4 days ago
Automatic scene activity modeling for improving object classification
In video surveillance, automatic methods for scene understanding and activity modeling can exploit the high redundancy of object trajectories observed over a long period of time. ...
Samuel Foucher, Marc Lalonde, Langis Gagnon
CCS
2008
ACM
14 years 11 months ago
Efficient attributes for anonymous credentials
We extend the Camenisch-Lysyanskaya anonymous credential system such that selective disclosure of attributes becomes highly efficient. The resulting system significantly improves ...
Jan Camenisch, Thomas Groß