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MICRO
2002
IEEE
97views Hardware» more  MICRO 2002»
15 years 4 months ago
Three extensions to register integration
Register integration (or just integration) is a register renaming discipline that implements instruction reuse via physical register sharing. Initially developed to perform squash...
Vlad Petric, Anne Bracy, Amir Roth
DAC
2005
ACM
15 years 1 months ago
Performance simulation modeling for fast evaluation of pipelined scalar processor by evaluation reuse
This paper proposes a rapid and accurate evaluation scheme for cycle counts of a pipelined processor using evaluation reuse technique. Since exploration of an optimal processor is...
Ho Young Kim, Tag Gon Kim
113
Voted
ESTIMEDIA
2005
Springer
15 years 5 months ago
Custom Processor Design Using NISC: A Case-Study on DCT algorithm
Designing Application-Specific Instruction-set Processors (ASIPs) usually requires designing a custom datapath, and modifying instruction-set, instruction decoder, and compiler. A...
Bita Gorjiara, Daniel D. Gajski
EH
2004
IEEE
117views Hardware» more  EH 2004»
15 years 3 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
86
Voted
DATE
2002
IEEE
153views Hardware» more  DATE 2002»
15 years 4 months ago
Low Power Embedded Software Optimization Using Symbolic Algebra
The market demand for portable multimedia applications has exploded in the recent years. Unfortunately, for such applications current compilers and software optimization methods o...
Armita Peymandoust, Tajana Simunic, Giovanni De Mi...