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» Bounded Model Checking for Timed Automata
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ATVA
2006
Springer
133views Hardware» more  ATVA 2006»
15 years 3 months ago
Branching-Time Property Preservation Between Real-Time Systems
In the past decades, many formal frameworks (e.g. timed automata and temporal logics) and techniques (e.g. model checking and theorem proving) have been proposed to model a real-ti...
Jinfeng Huang, Marc Geilen, Jeroen Voeten, Henk Co...
ICFEM
2009
Springer
15 years 5 months ago
Combining Static Model Checking with Dynamic Enforcement Using the Statecall Policy Language
Internet protocols encapsulate a significant amount of state, making implementing the host software complex. In this paper, we define the Statecall Policy Language (SPL) which pr...
Anil Madhavapeddy
ENTCS
2006
185views more  ENTCS 2006»
14 years 11 months ago
Time Domain Verification of Oscillator Circuit Properties
The application of formal methods to analog and mixed signal circuits requires efficient methods tructing abstractions of circuit behaviors. This paper concerns the verification o...
Goran Frehse, Bruce H. Krogh, Rob A. Rutenbar, Ode...
MAM
2008
138views more  MAM 2008»
14 years 11 months ago
FPGA based tester tool for hybrid real-time systems
This paper presents a design methodology for a hybrid Hardwarein-the-Loop (HIL) tester tool, based on both discrete event system theory, given by timed automata, and continuous sy...
Jan Krakora, Zdenek Hanzálek
CORR
2009
Springer
242views Education» more  CORR 2009»
14 years 9 months ago
Adaptive Scheduling of Data Paths using Uppaal Tiga
Abstract. We apply Uppaal Tiga to automatically compute adaptive scheduling strategies for an industrial case study dealing with a state-of-the-art image processing pipeline of a p...
Israa AlAttili, Fred Houben, Georgeta Igna, Steffe...