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» Bounded Model Checking for Timed Automata
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ADAEUROPE
2005
Springer
15 years 4 months ago
Non-intrusive System Level Fault-Tolerance
This paper describes the methodology used to add nonintrusive system-level fault tolerance to an electronic throttle controller. The original model of the throttle controller is a...
Kristina Lundqvist, Jayakanth Srinivasan, Sé...
HYBRID
2007
Springer
15 years 3 months ago
Safety Verification of an Aircraft Landing Protocol: A Refinement Approach
Abstract. In this paper, we propose a new approach for formal verification of hybrid systems. To do so, we present a new refinement proof technique, a weak refinement using step in...
Shinya Umeno, Nancy A. Lynch
ACSD
2006
IEEE
81views Hardware» more  ACSD 2006»
15 years 5 months ago
Monitoring and fault-diagnosis with digital clocks
We study the monitoring and fault-diagnosis problems for dense-time real-time systems, where observers (monitors and diagnosers) have access to digital rather than analog clocks. ...
Karine Altisen, Franck Cassez, Stavros Tripakis
DATE
2009
IEEE
90views Hardware» more  DATE 2009»
15 years 6 months ago
Property analysis and design understanding
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
Ulrich Kühne, Daniel Große, Rolf Drechs...
QEST
2006
IEEE
15 years 5 months ago
Compositional Performability Evaluation for STATEMATE
Abstract— This paper reports on our efforts to link an industrial state-of-the-art modelling tool to academic state-of-the-art analysis algorithms. In a nutshell, we enable timed...
Eckard Böde, Marc Herbstritt, Holger Hermanns...