1343 search results - page 107 / 269 » Bounded-lifetime integrated circuits |
103
Voted
ASPDAC
2007
ACM
15 years 4 months ago
2007
ACM
Abstract--An integrated test scheduling methodology for multiprocessor System-on-Chips (SOC) utilizing the functional buses for test data delivery is described. The proposed method...
104
Voted
DATE
2004
IEEE
15 years 4 months ago
2004
IEEE
The increasing complexity of system-on-chip (SOC) integrated circuits has spurred the development of versatile automatic test equipment (ATE) that can simultaneously drive differe...
114
Voted
EURODAC
1995
IEEE
15 years 4 months ago
1995
IEEE
DPLAYOUT is a layout synthesis tool for bit-sliced datapath designs targeting standard-cell libraries. We developed fast and efficient heuristics for placing the cells in a bit-s...
81
Voted
FPL
1995
Springer
15 years 4 months ago
1995
Springer
Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuumtube electronics [1], the increasing clock ...
115
Voted
DAC
2010
ACM
15 years 4 months ago
2010
ACM
Post-silicon validation is used to detect and fix bugs in integrated circuits and systems after manufacture. Due to sheer design complexity, it is nearly impossible to detect and ...