1343 search results - page 198 / 269 » Bounded-lifetime integrated circuits |
ARCS
2004
Springer
15 years 5 months ago
2004
Springer
: We investigated different parallel SIMD (single instruction multiple data) architectures based on pure programmable and reconfigurable approaches for their appropriateness for in...
FPL
2004
Springer
15 years 5 months ago
2004
Springer
Abstract. This paper introduces JHDLBits, the integration of two prominent FPGA design tools: JHDL and JBits. JHDLBits offers the low-level access and control provided by JBits wi...
FDL
2003
IEEE
15 years 5 months ago
2003
IEEE
Assuring correctness of digital designs is one of the major tasks in the system design flow. Formal methods have been proposed to accompany commonly used simulation approaches. I...
GLVLSI
2003
IEEE
15 years 5 months ago
2003
IEEE
A new split accumulator architecture to be used in direct digital frequency synthesizers (DDFS) systems is presented. This new design eliminates the need of adders on the section ...
GLVLSI
2003
IEEE
15 years 5 months ago
2003
IEEE
Clock-delayed (CD) domino is a dynamic logic family developed to provide both inverting and non-inverting logic on single-rail gates. It is self-timed and can be easily pipelined ...