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» Bounded-lifetime integrated circuits
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ISCAS
1999
IEEE
77views Hardware» more  ISCAS 1999»
15 years 4 months ago
Power reduction through iterative gate sizing and voltage scaling
The advent of portable and high-density devices has made power consumption a critical design concern. In this paper, we address the problem of reducing power consumption via gate-...
Chingwei Yeh, Min-Cheng Chang, Shih-Chieh Chang, W...
ISCAS
1999
IEEE
87views Hardware» more  ISCAS 1999»
15 years 4 months ago
A novel high gain, high bandwidth CMOS differential front-end for wireless optical systems
This paper describes a high performance CMOS differential input front-end, designed for optical wireless communications. The front-end achieves a 50 MHz bandwidth and a 400 K tran...
E. de Vasconcelos, J. L. Cura, Rui L. Aguiar, Dini...
VLSID
1998
IEEE
116views VLSI» more  VLSID 1998»
15 years 4 months ago
Synthesis of Testable RTL Designs
With several commercial tools becoming available, the high-level synthesis of applicationspeci c integrated circuits is nding wide spread acceptance in VLSI industry today. Existi...
C. P. Ravikumar, Sumit Gupta, Akshay Jajoo
ASPDAC
2007
ACM
164views Hardware» more  ASPDAC 2007»
15 years 3 months ago
Thermal-Aware 3D IC Placement Via Transformation
- 3D IC technologies can help to improve circuit performance and lower power consumption by reducing wirelength. Also, 3D IC technology can be used to realize heterogeneous system-...
Jason Cong, Guojie Luo, Jie Wei, Yan Zhang
ASPDAC
2007
ACM
123views Hardware» more  ASPDAC 2007»
15 years 3 months ago
Coupling-aware Dummy Metal Insertion for Lithography
As integrated circuits manufacturing technology is advancing into 65nm and 45nm nodes, extensive resolution enhancement techniques (RETs) are needed to correctly manufacture a chip...
Liang Deng, Martin D. F. Wong, Kai-Yuan Chao, Hua ...