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ASAP
1997
IEEE
156views Hardware» more  ASAP 1997»
15 years 2 months ago
Design methodology for digital signal processing
Improvements in semiconductor integration density and the resulting problem of having to manage designs of increasing complexity is an old one, but still current. The new challeng...
Gerhard Fettweis
TVLSI
2002
130views more  TVLSI 2002»
14 years 9 months ago
Incremental compilation for parallel logic verification systems
Although simulation remains an important part of application-specific integrated circuit (ASIC) validation, hardware-assisted parallel verification is becoming a larger part of the...
R. Tessier, S. Jana
ICCAD
2010
IEEE
121views Hardware» more  ICCAD 2010»
14 years 7 months ago
Multi-Wafer Virtual Probe: Minimum-cost variation characterization by exploring wafer-to-wafer correlation
In this paper, we propose a new technique, referred to as MultiWafer Virtual Probe (MVP) to efficiently model wafer-level spatial variations for nanoscale integrated circuits. Tow...
Wangyang Zhang, Xin Li, Emrah Acar, Frank Liu, Rob...
VLSI
2010
Springer
14 years 4 months ago
Spatial EM jamming: A countermeasure against EM Analysis?
Electro-Magnetic Analysis has been identified as an efficient technique to retrieve the secret key of cryptographic algorithms. Although similar mathematically speaking, Power or E...
Francois Poucheret, Lyonel Barthe, Pascal Benoit, ...
DAC
2011
ACM
13 years 9 months ago
AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection
In the era of deep sub-wavelength lithography for nanometer VLSI designs, manufacturability and yield issues are critical and need to be addressed during the key physical design i...
Duo Ding, Jhih-Rong Gao, Kun Yuan, David Z. Pan