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» Bounded-lifetime integrated circuits
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115
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DAC
2003
ACM
15 years 6 months ago
Realizable RLCK circuit crunching
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
Chirayu S. Amin, Masud H. Chowdhury, Yehea I. Isma...
82
Voted
ISLPED
2003
ACM
71views Hardware» more  ISLPED 2003»
15 years 6 months ago
Strained-si devices and circuits for low-power applications
Static and dynamic power for strained-Si device is analyzed and compared with conventional bulk-Si technology. Optimum device design points are suggested with controlling physical...
Keunwoo Kim, Rajiv V. Joshi, Ching-Te Chuang
99
Voted
ISCA
2010
IEEE
314views Hardware» more  ISCA 2010»
15 years 5 months ago
Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis
Power consumption has become a major constraint in the design of processors today. To optimize a processor for energyefficiency requires an examination of energy-performance trade...
Omid Azizi, Aqeel Mahesri, Benjamin C. Lee, Sanjay...
108
Voted
EH
2000
IEEE
183views Hardware» more  EH 2000»
15 years 5 months ago
A Reconfigurable Platform for the Automatic Synthesis of Analog Circuits
Reconfigurable chips are integrated circuits whose internal connections can be programmed by the user to attend a specific application. Field Programmable Gate Arrays (FPGAs) and ...
Ricardo Salem Zebulum, Cristina Costa Santini, Hel...
101
Voted
ICCAD
2000
IEEE
88views Hardware» more  ICCAD 2000»
15 years 5 months ago
Hierarchical Interconnect Circuit Models
The increasing size of integrated systems combined with deep submicron physical modeling details creates an explosion in RLC interconnect modeling complexity of unmanageable propo...
Michael W. Beattie, Satrajit Gupta, Lawrence T. Pi...