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» Bounding Loop Iterations for Timing Analysis
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ASPDAC
2006
ACM
130views Hardware» more  ASPDAC 2006»
15 years 3 months ago
Convergence-provable statistical timing analysis with level-sensitive latches and feedback loops
Statistical timing analysis has been widely applied to predict the timing yield of VLSI circuits when process variations become significant. Existing statistical latch timing met...
Lizheng Zhang, Jeng-Liang Tsai, Weijen Chen, Yuhen...
CGO
2007
IEEE
15 years 3 months ago
Iterative Optimization in the Polyhedral Model: Part I, One-Dimensional Time
Emerging microprocessors offer unprecedented parallel computing capabilities and deeper memory hierarchies, increasing the importance of loop transformations in optimizing compile...
Louis-Noël Pouchet, Cédric Bastoul, Al...
IRREGULAR
1995
Springer
15 years 1 months ago
Run-Time Parallelization of Irregular DOACROSS Loops
Dependencies between iterations of loop structures cannot always be determined at compile-time because they may depend on input data which is known only at run-time. A prime examp...
V. Prasad Krothapalli, Thulasiraman Jeyaraman, Mar...
ECRTS
2002
IEEE
15 years 2 months ago
Scope-Tree: A Program Representation for Symbolic Worst-Case Execution Time Analysis
Most WCET analysis techniques only provide an upper bound on the worst case execution time as a constant value. However, it often appears that the execution time of a piece of cod...
Antoine Colin, Guillem Bernat
WORDS
2003
IEEE
15 years 2 months ago
A Tool for Automatic Flow Analysis of C-programs for WCET Calculation
Bounding the Worst Case Execution Time (WCET) of programs is essential for real-time systems. To be able to do WCET calculations, the iteration bounds for loops and recursion must...
Jan Gustafsson, Björn Lisper, Christer Sandbe...